
output RAM_WE_PAD;
output RAM_CLKE_PAD;
output RAM_CS_PAD;
output RAM_CAS_PAD;
output RAM_RAS_PAD;
output RAM_CLK_PAD;

output RAM_A_PAD0;
output RAM_A_PAD1;
output RAM_A_PAD2;
output RAM_A_PAD3;
output RAM_A_PAD4;
output RAM_A_PAD5;
output RAM_A_PAD6;
output RAM_A_PAD7;
output RAM_A_PAD8;
output RAM_A_PAD9;
output RAM_A_PAD10;
output RAM_A_PAD11;
output RAM_A_PAD12;

output RAM_D_PAD0;
output RAM_D_PAD1;
output RAM_D_PAD2;
output RAM_D_PAD3;
output RAM_D_PAD4;
output RAM_D_PAD5;
output RAM_D_PAD6;
output RAM_D_PAD7;
output RAM_D_PAD8;
output RAM_D_PAD9;
output RAM_D_PAD10;
output RAM_D_PAD11;
output RAM_D_PAD12;
output RAM_D_PAD13;
output RAM_D_PAD14;
output RAM_D_PAD15;
output RAM_D_PAD16;
output RAM_D_PAD17;
output RAM_D_PAD18;
output RAM_D_PAD19;
output RAM_D_PAD20;
output RAM_D_PAD21;
output RAM_D_PAD22;
output RAM_D_PAD23;
output RAM_D_PAD24;
output RAM_D_PAD25;
output RAM_D_PAD26;
output RAM_D_PAD27;
output RAM_D_PAD28;
output RAM_D_PAD29;
output RAM_D_PAD30;
output RAM_D_PAD31;

output RAM_BA_PAD0;
output RAM_BA_PAD1;

output RAM_DM_PAD0;
output RAM_DM_PAD1;
output RAM_DM_PAD2;
output RAM_DM_PAD3;

OBUF RAM_BA_BUF0(.I(RAM_BA[0]), .O(RAM_BA_PAD0));
//synthesis attribute LOC of RAM_BA_PAD0 is "D4"
//synthesis attribute IOSTANDARD of RAM_BA_BUF0 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_BA_PAD0 is "TRUE"
//synthesis attribute DRIVE of RAM_BA_BUF0 is "12"

OBUF RAM_BA_BUF1(.I(RAM_BA[1]), .O(RAM_BA_PAD1));
//synthesis attribute LOC of RAM_BA_PAD1 is "F5"
//synthesis attribute IOSTANDARD of RAM_BA_BUF1 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_BA_PAD1 is "TRUE"
//synthesis attribute DRIVE of RAM_BA_BUF1 is "12"

OBUF RAM_CAS_BUF(.I(RAM_CAS), .O(RAM_CAS_PAD));
//synthesis attribute LOC of RAM_CAS_PAD is "B4"
//synthesis attribute IOSTANDARD of RAM_CAS_BUF is "LVCMOS25"
//synthesis attribute PULLUP of RAM_CAS_PAD is "TRUE"
//synthesis attribute DRIVE of RAM_CAS_BUF is "12"

OBUF RAM_CLK_BUF(.I(RAM_CLK), .O(RAM_CLK_PAD));
//synthesis attribute LOC of RAM_CLK_PAD is "D15"
//synthesis attribute IOSTANDARD of RAM_CLK_BUF is "LVCMOS25"
//synthesis attribute PULLUP of RAM_CLK_PAD is "TRUE"
//synthesis attribute DRIVE of RAM_CLK_BUF is "12"

OBUF RAM_CLKE_BUF(.I(RAM_CLKE), .O(RAM_CLKE_PAD));
//synthesis attribute LOC of RAM_CLKE_PAD is "C13"
//synthesis attribute IOSTANDARD of RAM_CLKE_BUF is "LVCMOS25"
//synthesis attribute PULLUP of RAM_CLKE_PAD is "TRUE"
//synthesis attribute DRIVE of RAM_CLKE_BUF is "12"

OBUF RAM_CS_BUF(.I(RAM_CS), .O(RAM_CS_PAD));
//synthesis attribute LOC of RAM_CS_PAD is "E6"
//synthesis attribute IOSTANDARD of RAM_CS_BUF is "LVCMOS25"
//synthesis attribute PULLUP of RAM_CS_PAD is "TRUE"
//synthesis attribute DRIVE of RAM_CS_BUF is "12"

OBUF RAM_RAS_BUF(.I(RAM_RAS), .O(RAM_RAS_PAD));
//synthesis attribute LOC of RAM_RAS_PAD is "D8"
//synthesis attribute IOSTANDARD of RAM_RAS_BUF is "LVCMOS25"
//synthesis attribute PULLUP of RAM_RAS_PAD is "TRUE"
//synthesis attribute DRIVE of RAM_RAS_BUF is "12"

OBUF RAM_WE_BUF(.I(RAM_WE), .O(RAM_WE_PAD));
//synthesis attribute LOC of RAM_WE_PAD is "D6"
//synthesis attribute IOSTANDARD of RAM_WE_BUF is "LVCMOS25"
//synthesis attribute PULLUP of RAM_WE_PAD is "TRUE"
//synthesis attribute DRIVE of RAM_WE_BUF is "12"

OBUF RAM_DM_BUF0(.I(RAM_DM[0]), .O(RAM_DM_PAD0));
//synthesis attribute LOC of RAM_DM_PAD0 is "C8"
//synthesis attribute IOSTANDARD of RAM_DM_BUF0 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_DM_PAD0 is "TRUE"
//synthesis attribute DRIVE of RAM_DM_BUF0 is "12"

OBUF RAM_DM_BUF1(.I(RAM_DM[1]), .O(RAM_DM_PAD1));
//synthesis attribute LOC of RAM_DM_PAD1 is "C15"
//synthesis attribute IOSTANDARD of RAM_DM_BUF1 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_DM_PAD1 is "TRUE"
//synthesis attribute DRIVE of RAM_DM_BUF1 is "12"

OBUF RAM_DM_BUF2(.I(RAM_DM[2]), .O(RAM_DM_PAD2));
//synthesis attribute LOC of RAM_DM_PAD2 is "P5"
//synthesis attribute IOSTANDARD of RAM_DM_BUF2 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_DM_PAD2 is "TRUE"
//synthesis attribute DRIVE of RAM_DM_BUF2 is "12"

OBUF RAM_DM_BUF3(.I(RAM_DM[3]), .O(RAM_DM_PAD3));
//synthesis attribute LOC of RAM_DM_PAD3 is "M16"
//synthesis attribute IOSTANDARD of RAM_DM_BUF3 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_DM_PAD3 is "TRUE"
//synthesis attribute DRIVE of RAM_DM_BUF3 is "12"




IOBUF RAM_D_BUF0(.IO(RAM_D_PAD0), .O(RAM_D_I[0]), .I(RAM_D_O[0]), .T(RAM_D_T[0]));
//synthesis attribute LOC of RAM_D_PAD0 is "A3"
//synthesis attribute IOSTANDARD of RAM_D_BUF0 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD0 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF0 is "12"

IOBUF RAM_D_BUF1(.IO(RAM_D_PAD1), .O(RAM_D_I[1]), .I(RAM_D_O[1]), .T(RAM_D_T[1]));
//synthesis attribute LOC of RAM_D_PAD1 is "A5"
//synthesis attribute IOSTANDARD of RAM_D_BUF1 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD1 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF1 is "12"

IOBUF RAM_D_BUF2(.IO(RAM_D_PAD2), .O(RAM_D_I[2]), .I(RAM_D_O[2]), .T(RAM_D_T[2]));
//synthesis attribute LOC of RAM_D_PAD2 is "A7"
//synthesis attribute IOSTANDARD of RAM_D_BUF2 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD2 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF2 is "12"

IOBUF RAM_D_BUF3(.IO(RAM_D_PAD3), .O(RAM_D_I[3]), .I(RAM_D_O[3]), .T(RAM_D_T[3]));
//synthesis attribute LOC of RAM_D_PAD3 is "A6"
//synthesis attribute IOSTANDARD of RAM_D_BUF3 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD3 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF3 is "12"

IOBUF RAM_D_BUF4(.IO(RAM_D_PAD4), .O(RAM_D_I[4]), .I(RAM_D_O[4]), .T(RAM_D_T[4]));
//synthesis attribute LOC of RAM_D_PAD4 is "B7"
//synthesis attribute IOSTANDARD of RAM_D_BUF4 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD4 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF4 is "12"

IOBUF RAM_D_BUF5(.IO(RAM_D_PAD5), .O(RAM_D_I[5]), .I(RAM_D_O[5]), .T(RAM_D_T[5]));
//synthesis attribute LOC of RAM_D_PAD5 is "B6"
//synthesis attribute IOSTANDARD of RAM_D_BUF5 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD5 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF5 is "12"

IOBUF RAM_D_BUF6(.IO(RAM_D_PAD6), .O(RAM_D_I[6]), .I(RAM_D_O[6]), .T(RAM_D_T[6]));
//synthesis attribute LOC of RAM_D_PAD6 is "C6"
//synthesis attribute IOSTANDARD of RAM_D_BUF6 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD6 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF6 is "12"

IOBUF RAM_D_BUF7(.IO(RAM_D_PAD7), .O(RAM_D_I[7]), .I(RAM_D_O[7]), .T(RAM_D_T[7]));
//synthesis attribute LOC of RAM_D_PAD7 is "B5"
//synthesis attribute IOSTANDARD of RAM_D_BUF7 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD7 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF7 is "12"

IOBUF RAM_D_BUF8(.IO(RAM_D_PAD8), .O(RAM_D_I[8]), .I(RAM_D_O[8]), .T(RAM_D_T[8]));
//synthesis attribute LOC of RAM_D_PAD8 is "B15"
//synthesis attribute IOSTANDARD of RAM_D_BUF8 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD8 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF8 is "12"

IOBUF RAM_D_BUF9(.IO(RAM_D_PAD9), .O(RAM_D_I[9]), .I(RAM_D_O[9]), .T(RAM_D_T[9]));
//synthesis attribute LOC of RAM_D_PAD9 is "B14"
//synthesis attribute IOSTANDARD of RAM_D_BUF9 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD9 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF9 is "12"

IOBUF RAM_D_BUF10(.IO(RAM_D_PAD10), .O(RAM_D_I[10]), .I(RAM_D_O[10]), .T(RAM_D_T[10]));
//synthesis attribute LOC of RAM_D_PAD10 is "C12"
//synthesis attribute IOSTANDARD of RAM_D_BUF10 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD10 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF10 is "12"

IOBUF RAM_D_BUF11(.IO(RAM_D_PAD11), .O(RAM_D_I[11]), .I(RAM_D_O[11]), .T(RAM_D_T[11]));
//synthesis attribute LOC of RAM_D_PAD11 is "B13"
//synthesis attribute IOSTANDARD of RAM_D_BUF11 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD11 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF11 is "12"

IOBUF RAM_D_BUF12(.IO(RAM_D_PAD12), .O(RAM_D_I[12]), .I(RAM_D_O[12]), .T(RAM_D_T[12]));
//synthesis attribute LOC of RAM_D_PAD12 is "A14"
//synthesis attribute IOSTANDARD of RAM_D_BUF12 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD12 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF12 is "12"

IOBUF RAM_D_BUF13(.IO(RAM_D_PAD13), .O(RAM_D_I[13]), .I(RAM_D_O[13]), .T(RAM_D_T[13]));
//synthesis attribute LOC of RAM_D_PAD13 is "A13"
//synthesis attribute IOSTANDARD of RAM_D_BUF13 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD13 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF13 is "12"

IOBUF RAM_D_BUF14(.IO(RAM_D_PAD14), .O(RAM_D_I[14]), .I(RAM_D_O[14]), .T(RAM_D_T[14]));
//synthesis attribute LOC of RAM_D_PAD14 is "A11"
//synthesis attribute IOSTANDARD of RAM_D_BUF14 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD14 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF14 is "12"

IOBUF RAM_D_BUF15(.IO(RAM_D_PAD15), .O(RAM_D_I[15]), .I(RAM_D_O[15]), .T(RAM_D_T[15]));
//synthesis attribute LOC of RAM_D_PAD15 is "C11"
//synthesis attribute IOSTANDARD of RAM_D_BUF15 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD15 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF15 is "12"

IOBUF RAM_D_BUF16(.IO(RAM_D_PAD16), .O(RAM_D_I[16]), .I(RAM_D_O[16]), .T(RAM_D_T[16]));
//synthesis attribute LOC of RAM_D_PAD16 is "H5"
//synthesis attribute IOSTANDARD of RAM_D_BUF16 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD16 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF16 is "12"

IOBUF RAM_D_BUF17(.IO(RAM_D_PAD17), .O(RAM_D_I[17]), .I(RAM_D_O[17]), .T(RAM_D_T[17]));
//synthesis attribute LOC of RAM_D_PAD17 is "H4"
//synthesis attribute IOSTANDARD of RAM_D_BUF17 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD17 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF17 is "12"

IOBUF RAM_D_BUF18(.IO(RAM_D_PAD18), .O(RAM_D_I[18]), .I(RAM_D_O[18]), .T(RAM_D_T[18]));
//synthesis attribute LOC of RAM_D_PAD18 is "J6"
//synthesis attribute IOSTANDARD of RAM_D_BUF18 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD18 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF18 is "12"

IOBUF RAM_D_BUF19(.IO(RAM_D_PAD19), .O(RAM_D_I[19]), .I(RAM_D_O[19]), .T(RAM_D_T[19]));
//synthesis attribute LOC of RAM_D_PAD19 is "J5"
//synthesis attribute IOSTANDARD of RAM_D_BUF19 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD19 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF19 is "12"

IOBUF RAM_D_BUF20(.IO(RAM_D_PAD20), .O(RAM_D_I[20]), .I(RAM_D_O[20]), .T(RAM_D_T[20]));
//synthesis attribute LOC of RAM_D_PAD20 is "M5"
//synthesis attribute IOSTANDARD of RAM_D_BUF20 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD20 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF20 is "12"

IOBUF RAM_D_BUF21(.IO(RAM_D_PAD21), .O(RAM_D_I[21]), .I(RAM_D_O[21]), .T(RAM_D_T[21]));
//synthesis attribute LOC of RAM_D_PAD21 is "L5"
//synthesis attribute IOSTANDARD of RAM_D_BUF21 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD21 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF21 is "12"

IOBUF RAM_D_BUF22(.IO(RAM_D_PAD22), .O(RAM_D_I[22]), .I(RAM_D_O[22]), .T(RAM_D_T[22]));
//synthesis attribute LOC of RAM_D_PAD22 is "M4"
//synthesis attribute IOSTANDARD of RAM_D_BUF22 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD22 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF22 is "12"

IOBUF RAM_D_BUF23(.IO(RAM_D_PAD23), .O(RAM_D_I[23]), .I(RAM_D_O[23]), .T(RAM_D_T[23]));
//synthesis attribute LOC of RAM_D_PAD23 is "K5"
//synthesis attribute IOSTANDARD of RAM_D_BUF23 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD23 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF23 is "12"

IOBUF RAM_D_BUF24(.IO(RAM_D_PAD24), .O(RAM_D_I[24]), .I(RAM_D_O[24]), .T(RAM_D_T[24]));
//synthesis attribute LOC of RAM_D_PAD24 is "V15"
//synthesis attribute IOSTANDARD of RAM_D_BUF24 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD24 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF24 is "12"

IOBUF RAM_D_BUF25(.IO(RAM_D_PAD25), .O(RAM_D_I[25]), .I(RAM_D_O[25]), .T(RAM_D_T[25]));
//synthesis attribute LOC of RAM_D_PAD25 is "T14"
//synthesis attribute IOSTANDARD of RAM_D_BUF25 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD25 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF25 is "12"

IOBUF RAM_D_BUF26(.IO(RAM_D_PAD26), .O(RAM_D_I[26]), .I(RAM_D_O[26]), .T(RAM_D_T[26]));
//synthesis attribute LOC of RAM_D_PAD26 is "P16"
//synthesis attribute IOSTANDARD of RAM_D_BUF26 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD26 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF26 is "12"

IOBUF RAM_D_BUF27(.IO(RAM_D_PAD27), .O(RAM_D_I[27]), .I(RAM_D_O[27]), .T(RAM_D_T[27]));
//synthesis attribute LOC of RAM_D_PAD27 is "K16"
//synthesis attribute IOSTANDARD of RAM_D_BUF27 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD27 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF27 is "12"

IOBUF RAM_D_BUF28(.IO(RAM_D_PAD28), .O(RAM_D_I[28]), .I(RAM_D_O[28]), .T(RAM_D_T[28]));
//synthesis attribute LOC of RAM_D_PAD28 is "N16"
//synthesis attribute IOSTANDARD of RAM_D_BUF28 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD28 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF28 is "12"

IOBUF RAM_D_BUF29(.IO(RAM_D_PAD29), .O(RAM_D_I[29]), .I(RAM_D_O[29]), .T(RAM_D_T[29]));
//synthesis attribute LOC of RAM_D_PAD29 is "L16"
//synthesis attribute IOSTANDARD of RAM_D_BUF29 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD29 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF29 is "12"

IOBUF RAM_D_BUF30(.IO(RAM_D_PAD30), .O(RAM_D_I[30]), .I(RAM_D_O[30]), .T(RAM_D_T[30]));
//synthesis attribute LOC of RAM_D_PAD30 is "M15"
//synthesis attribute IOSTANDARD of RAM_D_BUF30 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD30 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF30 is "12"

IOBUF RAM_D_BUF31(.IO(RAM_D_PAD31), .O(RAM_D_I[31]), .I(RAM_D_O[31]), .T(RAM_D_T[31]));
//synthesis attribute LOC of RAM_D_PAD31 is "J15"
//synthesis attribute IOSTANDARD of RAM_D_BUF31 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_D_PAD31 is "TRUE"
//synthesis attribute DRIVE of RAM_D_BUF31 is "12"




OBUF RAM_A_BUF0(.I(RAM_A[0]), .O(RAM_A_PAD0));
//synthesis attribute LOC of RAM_A_PAD0 is "E5"
//synthesis attribute IOSTANDARD of RAM_A_BUF0 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD0 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF0 is "12"

OBUF RAM_A_BUF1(.I(RAM_A[1]), .O(RAM_A_PAD1));
//synthesis attribute LOC of RAM_A_PAD1 is "G4"
//synthesis attribute IOSTANDARD of RAM_A_BUF1 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD1 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF1 is "12"

OBUF RAM_A_BUF2(.I(RAM_A[2]), .O(RAM_A_PAD2));
//synthesis attribute LOC of RAM_A_PAD2 is "G5"
//synthesis attribute IOSTANDARD of RAM_A_BUF2 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD2 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF2 is "12"

OBUF RAM_A_BUF3(.I(RAM_A[3]), .O(RAM_A_PAD3));
//synthesis attribute LOC of RAM_A_PAD3 is "F4"
//synthesis attribute IOSTANDARD of RAM_A_BUF3 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD3 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF3 is "12"

OBUF RAM_A_BUF4(.I(RAM_A[4]), .O(RAM_A_PAD4));
//synthesis attribute LOC of RAM_A_PAD4 is "H16"
//synthesis attribute IOSTANDARD of RAM_A_BUF4 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD4 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF4 is "12"

OBUF RAM_A_BUF5(.I(RAM_A[5]), .O(RAM_A_PAD5));
//synthesis attribute LOC of RAM_A_PAD5 is "F16"
//synthesis attribute IOSTANDARD of RAM_A_BUF5 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD5 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF5 is "12"

OBUF RAM_A_BUF6(.I(RAM_A[6]), .O(RAM_A_PAD6));
//synthesis attribute LOC of RAM_A_PAD6 is "J16"
//synthesis attribute IOSTANDARD of RAM_A_BUF6 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD6 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF6 is "12"

OBUF RAM_A_BUF7(.I(RAM_A[7]), .O(RAM_A_PAD7));
//synthesis attribute LOC of RAM_A_PAD7 is "F15"
//synthesis attribute IOSTANDARD of RAM_A_BUF7 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD7 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF7 is "12"

OBUF RAM_A_BUF8(.I(RAM_A[8]), .O(RAM_A_PAD8));
//synthesis attribute LOC of RAM_A_PAD8 is "E15"
//synthesis attribute IOSTANDARD of RAM_A_BUF8 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD8 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF8 is "12"

OBUF RAM_A_BUF9(.I(RAM_A[9]), .O(RAM_A_PAD9));
//synthesis attribute LOC of RAM_A_PAD9 is "G16"
//synthesis attribute IOSTANDARD of RAM_A_BUF9 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD9 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF9 is "12"

OBUF RAM_A_BUF10(.I(RAM_A[10]), .O(RAM_A_PAD10));
//synthesis attribute LOC of RAM_A_PAD10 is "D5"
//synthesis attribute IOSTANDARD of RAM_A_BUF10 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD10 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF10 is "12"

OBUF RAM_A_BUF11(.I(RAM_A[11]), .O(RAM_A_PAD11));
//synthesis attribute LOC of RAM_A_PAD11 is "E14"
//synthesis attribute IOSTANDARD of RAM_A_BUF11 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD11 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF11 is "12"

OBUF RAM_A_BUF12(.I(RAM_A[12]), .O(RAM_A_PAD12));
//synthesis attribute LOC of RAM_A_PAD12 is "E16"
//synthesis attribute IOSTANDARD of RAM_A_BUF12 is "LVCMOS25"
//synthesis attribute PULLUP of RAM_A_PAD12 is "TRUE"
//synthesis attribute DRIVE of RAM_A_BUF12 is "12"
